Recursive Learning: A New Implication Technique for Efficient Solutions to CAD-Problems—Test, Verification, and Optimization

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 13, Issue 9, 1994, Pages 1143-1158

  Kunz, Wolfgang ^a   Pradhan, Dhiraj K ^b  

^a UNIVERSITY OF POTSDAM   (Germany)

^b TEXAS A AND M UNIVERSITY   (United States)

Author keywords

boolean satisfiability; design verification; multilevel optimization; necessary assignments; precise implications; Recursive learning; unjustified gates

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; COMBINATORIAL CIRCUITS; DIGITAL CIRCUITS; ERROR DETECTION; LEARNING SYSTEMS; LOGIC GATES; OPTIMIZATION; RECURSIVE FUNCTIONS; REDUNDANCY; SEQUENTIAL CIRCUITS;

BOOLEAN SATISFIABILITY; BRANCH AND BOUND TECHNIQUE; DESIGN VERIFICATION; FAULT DETECTION; RECURSIVE LEARNING; TEST PATTERN GENERATION;

COMPUTER AIDED LOGIC DESIGN;

EID: 0028501364     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.310903     Document Type: Article

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