High Performance Low Temperature Polysilicon thin Film Transistor Using ECR Plasma Thermal Oxide as Gate Insulator

IEEE Electron Device Letters

Volumn 15, Issue 8, 1994, Pages 301-303

  Lee, Jung Yeal ^a   Han, Chul Hi ^b   Kim, Choong Ki ^b  

^a Hynix Semiconductor Inc   (South Korea)

^b Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; CRYSTALLIZATION; ELECTRIC INSULATORS; ELECTRIC PROPERTIES; FILM GROWTH; GATES (TRANSISTOR); INTERFACES (MATERIALS); LOW TEMPERATURE PROPERTIES; OXIDES; PLASMA APPLICATIONS; SEMICONDUCTING SILICON; THIN FILM DEVICES;

ELECTRON CYCLOTRON RESONANCE; GATE INSULATOR; PLASMA THERMAL OXIDE; POLYSILICON; SOLID PHASE CRYSTALLIZATION; THIN FILM TRANSISTOR;

TRANSISTORS;

EID: 0028485023     PISSN: 07413106     EISSN: 15580563     Source Type: Journal    
DOI: 10.1109/55.296223     Document Type: Article

References (10)

1. H. Ohshima and S. Morozumi, “Future trends for TFT integrated circuits on glass substrates,” in IEDM Tech. Dig., 1989, p. 157.
2. H. Izawa, Y. Nishi, M. Okamoto, H. Morimoto, and M. Ishii, “Low temperature deposition of high quality silicon oxide films,” in Extended 22nd Int. Conf. Solid State Devices and Mater. • 1990, p. 183.
3. Batey and E. Tierney, “Low-temperature deposition of high-quality silicon dioxide by plasma-enhanced chemical vapor deposition,” J. Appl. Phys., vol. 60, p. 3136, 1986.
4. D. A. Carl, W. Hess. and M. A. Lieberman, “Oxidation of silicon in an electron cyclotron resonance oxygen plasma: Kinetics, physicochemical, and electrical properties, J. Vac. Sci. Technol. A, vol. 8, p. 2924,1990.
5. K.T. S ung and S. w. rang, “Oxidation of silicon in an oxygen plasma generated by a multipolar electron cyclotron resonance source,” J. Vac. Sci. Technol. B, vol. 10, p. 2211, 1992.
6. H. N. Chern, C. L. Lee, and T. F. Lei, “H 2 /O 2 plasma on polysilicon thin-film transistors,” IEEE Electron Device Lett., vol. 14, p. 115, 1993.
7. P. A. Heimann, S. P. Murarka, and T. T. Sheng, “Electrical conduction and breakdown in oxides of polycrystalline silicon and their correlation with interface texture,” J. Appl. Phys., vol. 53, p. 6240, 1982.
8. L. Faraone, R. Vibronek, and J. Mc Ginn, “Characterization of thermally oxidized n + polycrystalline silicon,” IEEE Trans. Electron Devices, vol. 32, p. 577, 1985.
9. J. C. Lee and C. Hu, “Polarity asymmetry of oxides grown on polycrystalline silicon,” IEEE Trans. Electron Devices, vol. 35, p. 1063, 1988.
10. I. W. Wu, W. B. Jackson, T. Y. Huang, A. G. Lewis, and A. Chiang, “Mechanism of device degradation in n-and p-channel poly silicon TFT's by electrical stressing,” IEEE Electron Device Lett., vol. 11, p. 167, 1990.