Broad-Side Delay Test

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 13, Issue 8, 1994, Pages 1057-1064

  Savir, Jacob ^a   Patil, Srinivas ^a  

^a IBM MICROELECTRONICS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTER SIMULATION; ERROR DETECTION; FAILURE ANALYSIS; LOGIC GATES; MATHEMATICAL MODELS; PROBABILITY; RANDOM PROCESSES; SEQUENTIAL MACHINES; VECTORS;

BROAD SIDE DELAY; SCAN BASED DELAY TEST; TEST VECTORS;

DELAY CIRCUITS;

EID: 0028484854     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.298042     Document Type: Article

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