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Volumn 40, Issue 3, 1994, Pages 703-710
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A 0.8 μ 100-MHz 2-D DCT core processor
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Author keywords
[No Author keywords available]
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Indexed keywords
ALGORITHMS;
DATA COMPRESSION;
DIGITAL ARITHMETIC;
IMAGE COMPRESSION;
INTEGRATED CIRCUIT LAYOUT;
MATHEMATICAL TRANSFORMATIONS;
MULTIPLYING CIRCUITS;
RANDOM ACCESS STORAGE;
TECHNOLOGY;
VLSI CIRCUITS;
DISCRETE COSINE TRANSFORM;
HARDWARE OVERHEAD;
MULTIPLIER ACCUMULATOR;
PIXEL RATE;
TWO DIMENSIONAL DISCRETE COSINE TRANSFORM CORE PROCESSOR;
COMPUTER HARDWARE;
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EID: 0028481156
PISSN: 00983063
EISSN: None
Source Type: Journal
DOI: 10.1109/30.320861 Document Type: Article |
Times cited : (19)
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References (6)
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