Parallel Architectures for 3-Step Hierarchical Search Block-Matching Algorithm

IEEE Transactions on Circuits and Systems for Video Technology

Volumn 4, Issue 4, 1994, Pages 407-416

  Jong, Her Ming ^a   Chen, Liang Gee ^a   Chiueh, Tzi Dar ^a  

^a NATIONAL TAIWAN UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; DATA DESCRIPTION; DATA STRUCTURES; HIERARCHICAL SYSTEMS; IMAGE CODING; IMAGE COMPRESSION; PARALLEL PROCESSING SYSTEMS; VIDEO SIGNAL PROCESSING;

MOTION COMPENSATED HYBRID CODING; MOTION PICTURES EXPERTS GROUP (MPEG); THREE STEP HIERARCHICAL SEARCH BLOCK MATCHING ALGORITHM;

COMPUTER ARCHITECTURE;

EID: 0028480896     PISSN: 10518215     EISSN: 15582205     Source Type: Journal    
DOI: 10.1109/76.313135     Document Type: Article

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