A Fully Complementary BiCMOS Technology for 10 V Mixed-Signal Circuit Applications

IEEE Transactions on Electron Devices

Volumn 41, Issue 7, 1994, Pages 1149-1160

  Ito, Akira ^a   Church, Michael D ^a   Rhee, Choong Sun ^a   Johnston, Jeffrey M ^a   Gasner, John T ^a   Ligon, William A ^a   Begley, Patrick A ^a   DeJong, Glenn A ^a  

^a INTERSIL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR INTEGRATED CIRCUITS; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR JUNCTIONS; THERMAL EFFECTS; TRANSISTORS; ZENER DIODES;

COMPLEMENTARY BICMOS TECHNOLOGY; DRAIN STRUCTURE; GATE OXIDE THICKNESS; MIXED SIGNAL CIRCUIT APPLICATIONS;

CMOS INTEGRATED CIRCUITS;

EID: 0028466408     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.293342     Document Type: Article

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