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Volumn 13, Issue 7, 1994, Pages 950-956

Analysis of Cyclic Combinational Circuits

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK SYNTHESIS; ELECTRIC NETWORK TOPOLOGY; FORMAL LOGIC; REDUNDANCY; SEQUENTIAL CIRCUITS;

EID: 0028461499     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.293952     Document Type: Article
Times cited : (91)

References (13)
  • 3
    • 0022769976 scopus 로고
    • Graph-Based Algorithms for Boolean Function Manipulation
    • Aug.
    • R. E. Bryant, “Graph-Based Algorithms for Boolean Function Manipulation,” in IEEE Trans. Comput., vol. C-35, pp. 677–691, Aug. 1986.
    • (1986) IEEE Trans. Comput , vol.C-35 , pp. 677-691
    • Bryant, R.E.1
  • 4
  • 5
    • 0039198811 scopus 로고
    • Advances in asynchronous circuit theory Part I: Gate and Unbounded Inertial Delay Models
    • Oct.
    • J. A. Brzozowski and C. J. Seger, “Advances in asynchronous circuit theory—Part I: Gate and Unbounded Inertial Delay Models,” Bulletin European Assoc. Theoretical Comput. Sci., Oct. 1990.
    • (1990) Bulletin European Assoc. Theoretical Comput. Sci
    • Brzozowski, J.A.1    Seger, C.J.2
  • 6
    • 0027544793 scopus 로고
    • Path sensitization in critical path problem
    • Feb.
    • H. C. Chen and D. H. C. Du, “Path sensitization in critical path problem,” IEEE Trans. Computer-Aided Design, pp. 196–207, Feb. 1993.
    • (1993) IEEE Trans. Computer-Aided Design , pp. 196-207
    • Chen, H.C.1    Du, D.H.C.2
  • 8
    • 0014738529 scopus 로고
    • The necessity of closed loops in minimal combinational circuits
    • Feb.
    • W. H. Kautz, “The necessity of closed loops in minimal combinational circuits,” IEEE Trans. Comput., pp. 162–164, Feb. 1970.
    • (1970) IEEE Trans. Comput , pp. 162-164
    • Kautz, W.H.1
  • 10
    • 84939707071 scopus 로고
    • Synthesis and testing of cyclic combinational circuits
    • Dept. of Elect. Eng. Princeton Univ., In preparation.
    • S. Malik and P. Ashar, “Synthesis and testing of cyclic combinational circuits,” Tech. Rep., Dept. of Elect. Eng. Princeton Univ., 1993. In preparation.
    • (1993) Tech. Rep
    • Malik, S.1    Ashar, P.2
  • 13
    • 0026981870 scopus 로고
    • False loops through resource sharing
    • Nov.
    • L. Stok, “False loops through resource sharing,” in Proc. Int. Conf. Computer-Aided Design, Nov. 1992, pp. 345–348.
    • (1992) Proc. Int. Conf. Computer-Aided Design , pp. 345-348
    • Stok, L.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.