Enhancing the Stability of Asymptotic Waveform Evaluation for Digital Interconnect Circuit Applications

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 13, Issue 6, 1994, Pages 729-736

  Anastasakis, Demosthenes F ^a   Gopal, Nanda ^b   Kim, Seok Yoon ^c   Pillage, Lawrence T ^d  

^a MENTOR GRAPHICS CORPORATION   (United States)

^b INTEL CORPORATION   (United States)

^c MOTOROLA INC   (United States)

^d UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPROXIMATION THEORY; ELECTRIC NETWORK ANALYSIS; ELECTRIC WAVEFORMS; ELECTRIC WIRING; POLES AND ZEROS; STEP RESPONSE; WAVEFORM ANALYSIS;

ASYMPTOTIC WAVEFORM EVALUATION; DIGITAL INTERCONNECT CIRCUIT APPLICATIONS;

DIGITAL INTEGRATED CIRCUITS;

EID: 0028448668     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.285247     Document Type: Article

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