A Preprocessing Architecture for Resolution Enhancement in High-Speed Analog-to-Digital Converters

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 41, Issue 6, 1994, Pages 373-379

  Pace, P E ^a   Ramamoorthy, P A ^b   Styer, David ^b  

^a NAVAL POSTGRADUATE SCHOOL   (United States)

^b UNIVERSITY OF CINCINNATI   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPARATOR CIRCUITS; COMPUTATIONAL COMPLEXITY; COMPUTER ARCHITECTURE; IMAGE ENHANCEMENT; IMAGE PROCESSING; IMAGE QUALITY; OPTICAL RESOLVING POWER; WAVEFORM ANALYSIS;

ANALOG FOLDING CIRCUITS; HIGH SPEED ANALOG TO DIGITAL CONVERTERS; PREPROCESSING ARCHITECTURE; RESOLUTION ENHANCEMENT; SYMMETRICAL NUMBER SYSTEM;

ANALOG TO DIGITAL CONVERSION;

EID: 0028444740     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.300194     Document Type: Article

References (13)

1. A. Arbel and R. Kurz, “Fast ADC,” IEEE Trans. Nuclear Sci., vol. 22, pp. 446–451, 1975.
2. U. Fiedler and D Seitzer, “A high-speed 8-bit A/D converter based on a Gray-code multiple folding circuit,” IEEE J. Solid State Circ., vol. 14, pp. 547–551, 1979.
3. R. J. Van De Plassche and R. E. J. Van Der Grift, “A high-speed 7-bit A/D converter,” IEEE J. Solid State Circ., vol. 14, pp. 938–943, 1979.
4. R. E. J. Van Der Grift and R. J. Van De Plassche, “A monolithic 8-bit video A/D converter,” IEEE J. Solid State Circ., vol. 19, pp. 374–378, 1984.
5. R. E. J. Van De Grift, I. W. J. M. Rutten and M. Van Der Veen, “An 8-bit video ADC incorporating folding and interpolation techniques,” IEEE J. of Solid State Circ., vol. 22, pp. 944–953, 1987.
6. R. J. Van De Plassche and P. Baltus, “An 8-bit 100-MHz full-Nyquist analog-to-digital converter,” IEEE J. Solid State Circ., vol. 23, pp. 1334–1344, 1988.
7. J. Van Valburg and R. J. Van De Plassche, “An 8-b 650-MHz folding ADC,” IEEE J. Solid State Circ., vol. 27, pp. 1662–1666, 1992.
8. N. S. Szabo and R. I. Tanaka, Residue Arithmetic And Its Applications To Computer Technology, New York: McGraw-Hill, 1967.
9. M. A. Soderstrand, W. K. Jenkins, G. A. Jullien and F. J. Taylor, Eds., Modern Applications of Residue Number System Arithmetic to Digital Signal Processing, New York, NY: IEEE Press, 1986.
10. W. K. Jenkins, “Techniques for residue-to-analog conversion for residue-encoded digital filters,” IEEE Trans. Circ. Syst., vol. CAS-25, pp. 555–562, 1978.
11. K. M. Ibrahim and S. N. Saloum, “An efficient residue to binary converter design,” IEEE Trans. Circ. Syst., vol. 35, pp. 1156–1162, 1988.
12. D. Mandelbaum, “Error correction in residue arithmetic,” IEEE Trans. Comput., vol. C-21, pp. 538–545, 1972.
13. I. Niven and H. S. Zuckerman, An Introduction to the Theory of Numbers, 4th ed., New York: John Wiley, 1980.