RICE: Rapid Interconnect Circuit Evaluation. Using AWE

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 13, Issue 6, 1994, Pages 763-776

  Ratzlaff, Curtis L ^a   Pillage, Lawrence T ^a  

^a UNIVERSITY OF TEXAS AT AUSTIN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER AIDED NETWORK ANALYSIS; CRITICAL PATH ANALYSIS; ELECTRIC WAVEFORMS; ELECTRIC WIRING; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; NETWORK COMPONENTS; SIGNAL PROCESSING; WAVEFORM ANALYSIS;

ASYMPTOTIC WAVEFORM EVALUATION; RAPID INTERCONNECT CIRCUIT EVALUATION; SIGNAL PATH DELAYS;

DELAY CIRCUITS;

EID: 0028444580     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.285250     Document Type: Article

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