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Volumn 29, Issue 5, 1994, Pages 572-579

Low-voltage, low-power BiCMOS digital circuits

Author keywords

[No Author keywords available]

Indexed keywords

BIPOLAR TRANSISTORS; BUFFER CIRCUITS; CAPACITANCE; COMPUTER SIMULATION; DIGITAL CIRCUITS; ELECTRIC NETWORK ANALYSIS; GATES (TRANSISTOR); INTEGRATED CIRCUIT LAYOUT; LEAKAGE CURRENTS; PERMITTIVITY; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES;

EID: 0028436525     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.284709     Document Type: Article
Times cited : (11)

References (17)
  • 1
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    • H. Momose 0.5 micron BiCMOS technology IEDM Tech. Dig. 838 840 IEDM Tech. Dig. 1987-Dec.
    • (1987) , pp. 838-840
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  • 2
    • 0024870445 scopus 로고
    • Future BiCMOS technology for scaled supply voltage
    • A. Watanabe Future BiCMOS technology for scaled supply voltage IEDM Tech. Dig. 429 432 IEDM Tech. Dig. 1989-Dec.
    • (1989) , pp. 429-432
    • Watanabe, A.1
  • 3
    • 0025948684 scopus 로고
    • Evaluation of delay time degradation of low-voltage BiCMOS based on a novel analytical delay-time modeling
    • M. Fujishima Evaluation of delay time degradation of low-voltage BiCMOS based on a novel analytical delay-time modeling IEEE J. of Solid-State Circuits 26 1 25 31 Jan. 1991
    • (1991) IEEE J. of Solid-State Circuits , vol.26 , Issue.1 , pp. 25-31
    • Fujishima, M.1
  • 4
    • 0024664156 scopus 로고
    • Process integration and device performance of a submicrometer BiCMOS with 16-GHz fT double poly-bipolar devices
    • T. Yamaguchi T. H. Yuzuriha Process integration and device performance of a submicrometer BiCMOS with 16-GHz fT double poly-bipolar devices IEEE Trans. Electron Devices 36 5 890 896 May 1989
    • (1989) IEEE Trans. Electron Devices , vol.36 , Issue.5 , pp. 890-896
    • Yamaguchi, T.1    Yuzuriha, T.H.2
  • 5
    • 0342664140 scopus 로고
    • BiCMOS circuit technology for a high speed SRAM
    • T. Douseki Y. Ohmori BiCMOS circuit technology for a high speed SRAM IEEE J. Solid-State Circuits 23 1 68 73 Feb. 1988
    • (1988) IEEE J. Solid-State Circuits , vol.23 , Issue.1 , pp. 68-73
    • Douseki, T.1    Ohmori, Y.2
  • 6
    • 0024940021 scopus 로고
    • Full-swing complementary BiCMOS logic circuits
    • H. Shin Full-swing complementary BiCMOS logic circuits BCTM Tech. Dig. 229 232 BCTM Tech. Dig. 1989
    • (1989) , pp. 229-232
    • Shin, H.1
  • 7
    • 0026866849 scopus 로고
    • Analytical and numerical analyses of the delay time of BiCMOS structures
    • S. S. Rofail Μ. I Elmasry Analytical and numerical analyses of the delay time of BiCMOS structures IEEE J. Solid-State Circuits 27 5 834 839 May 1992
    • (1992) IEEE J. Solid-State Circuits , vol.27 , Issue.5 , pp. 834-839
    • Rofail, S.S.1    Elmasry, Μ.I2
  • 8
    • 0026140442 scopus 로고
    • Analysis and optimization of BiCMOS digital circuit structures
    • S. H. Embabi Analysis and optimization of BiCMOS digital circuit structures IEEE J Solid-State Circuits 26 4 676 679 April 1991
    • (1991) IEEE J Solid-State Circuits , vol.26 , Issue.4 , pp. 676-679
    • Embabi, S.H.1
  • 9
    • 0024055902 scopus 로고
    • An engineering model for short-channel MOS devices
    • K.-Y. Toh An engineering model for short-channel MOS devices IEEE J. Solid-State Circuits 23 4 950 958 Aug. 1988
    • (1988) IEEE J. Solid-State Circuits , vol.23 , Issue.4 , pp. 950-958
    • Toh, K.-Y.1
  • 10
    • 84939752686 scopus 로고
    • Characteristics and scaling properties of n-p-n transistors with a sidewall base contact structure
    • K. Nakazato Characteristics and scaling properties of n-p-n transistors with a sidewall base contact structure IEEE Trans. Electron Devices 32 2 328 332 Feb. 1985
    • (1985) IEEE Trans. Electron Devices , vol.32 , Issue.2 , pp. 328-332
    • Nakazato, K.1
  • 11
    • 0004005306 scopus 로고
    • Physics of Semiconductor Devices
    • Wiley New York
    • S. M. Sze Physics of Semiconductor Devices 1981 Wiley New York
    • (1981)
    • Sze, S.M.1
  • 12
    • 0024896104 scopus 로고
    • Scaling rules for bipolar transistors in BiCMOS circuits
    • G. Rosseel R. Dutton Scaling rules for bipolar transistors in BiCMOS circuits Int. Electron Devices Meeting, Technol. Dig. 795 798 Int. Electron Devices Meeting, Technol. Dig. 1989-Dec.
    • (1989) , pp. 795-798
    • Rosseel, G.1    Dutton, R.2
  • 13
    • 0025474623 scopus 로고
    • Scaling of digital BiCMOS circuits
    • A. Bellaouar Scaling of digital BiCMOS circuits IEEE J. Solid-State Circuits 25 4 932 941 Aug. 1990
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.4 , pp. 932-941
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  • 14
    • 0026107864 scopus 로고
    • New full-voltage swing BiCMOS buffers
    • S. Embabi New full-voltage swing BiCMOS buffers IEEE J. Solid-State Circuits 26 2 150 153 Feb. 1991
    • (1991) IEEE J. Solid-State Circuits , vol.26 , Issue.2 , pp. 150-153
    • Embabi, S.1
  • 15
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    • Performance comparison of driver configurations and full swing techniques for BiCMOS logic circuits
    • H. J. Shin Performance comparison of driver configurations and full swing techniques for BiCMOS logic circuits IEEE J. Solid-State Circuits 25 3 863 865 June 1990
    • (1990) IEEE J. Solid-State Circuits , vol.25 , Issue.3 , pp. 863-865
    • Shin, H.J.1
  • 16
    • 0026253926 scopus 로고
    • High gain lateral bipolar action in a MOSFET structure
    • S. Vandebroek High gain lateral bipolar action in a MOSFET structure IEEE Trans. Electron Devices 38 11 2487 2496 Nov. 1991
    • (1991) IEEE Trans. Electron Devices , vol.38 , Issue.11 , pp. 2487-2496
    • Vandebroek, S.1
  • 17
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    • CMOS—compatible lateral bipolar transistor for BiCMOS technology: Part ii—experimental results
    • A. Tamba CMOS—compatible lateral bipolar transistor for BiCMOS technology: Part ii—experimental results IEEE Trans. Electron Devices 39 8 1865 1869 Aug. 1992
    • (1992) IEEE Trans. Electron Devices , vol.39 , Issue.8 , pp. 1865-1869
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.