Metallized Ultra-Shallow-Junction Device Technology for Sub-0.1 µm Gate MOSFET’s

IEEE Transactions on Electron Devices

Volumn 41, Issue 5, 1994, Pages 745-750

  Hisamoto, Digh ^a   Nakamura, Kaori ^a   Saito, Masayoshi ^a   Kobayashi, Nobuyoshi ^a   Kimura, Shin'ichiro ^a   Nagai, Ryo ^a   Nishida, Takashi ^a   Takeda, Eiji ^a  

^a HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CHEMICAL VAPOR DEPOSITION; CMOS INTEGRATED CIRCUITS; ELECTRIC PROPERTIES; ELECTRIC RESISTANCE; GATES (TRANSISTOR); METALLIZING; MOSFET DEVICES; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR JUNCTIONS; SUBSTRATES; TUNGSTEN;

METALLIZATION; SELECTIVE TUNGSTEN PROCESS; ULTRA SHALLOW JUNCTION DEVICE;

SILICON ON INSULATOR TECHNOLOGY;

EID: 0028428616     PISSN: 00189383     EISSN: 15579646     Source Type: Journal    
DOI: 10.1109/16.285027     Document Type: Article

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