An Approach to the Analysis and Detection of Crosstalk Faults in Digital VLSI Circuits

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 13, Issue 3, 1994, Pages 387-395

  Rubio, Antonio ^a   Itazaki, Noriyoshi ^b   Xu, Xiaole ^b   Kinoshita, Kozo ^b  

^a UNIVERSITAT POLITÈCNICA DE CATALUNYA   (Spain)

^b OSAKA UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; COMPUTER AIDED DESIGN; CROSSTALK; ELECTRIC FAULT LOCATION; ELECTRIC NETWORK ANALYSIS; ERROR DETECTION; LOGIC CIRCUITS; MATHEMATICAL MODELS; NUMERICAL METHODS; PATTERN RECOGNITION; SWITCHING; VLSI CIRCUITS;

COMPUTER AIDED TESTING; CROSSTALK FAULTS; DIGITAL VLSI CIRCUITS; LOGIC ERRORS; PARASITIC CAPACITANCES;

DIGITAL CIRCUITS;

EID: 0028392572     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.265680     Document Type: Article

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