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Volumn 29, Issue 3, 1994, Pages 217-225

A Switched Capacitor Circuit Simulator: AWEswit

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL FILTERS; SIGNAL PROCESSING; SWITCHING NETWORKS;

EID: 0028386026     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.278343     Document Type: Article
Times cited : (19)

References (22)
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    • (1983) Proc. IEEE
    • Liou, M.L.1    Kuo, Y.-L.2    Lee, C.F.3
  • 3
    • 0003369344 scopus 로고
    • SPICE2: A computer program to simulate semiconductor circuits
    • Univ. California, Berkeley, May
    • L. W. Nagel, “SPICE2: A computer program to simulate semiconductor circuits,” Electron. Res. Lab. Rep. ERL M520, Univ. California, Berkeley, May 1975.
    • (1975) Electron. Res. Lab. Rep. ERL M520
    • Nagel, L.W.1
  • 4
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    • Exact analysis of swtiched-capacitor circuits with arbitrary inputs
    • Apr.
    • M. L. Liou and Y. L. Kuo, “Exact analysis of swtiched-capacitor circuits with arbitrary inputs,” IEEE Trans. Circuits Syst., Apr. 1979.
    • (1979) IEEE Trans. Circuits Syst.
    • Liou, M.L.1    Kuo, Y.L.2
  • 6
    • 0025542703 scopus 로고
    • Simulation of mixed switched-capacitor/digital networks with signal driven switches
    • Dec.
    • K. Suyama, S. C. Fang, and Y. Tsividis, “Simulation of mixed switched-capacitor/digital networks with signal driven switches,” IEEE J. Solid-State Circuits, pp. 1403-1413, Dec. 1990.
    • (1990) IEEE J. Solid-State Circuits , pp. 1403-1413
    • Suyama, K.1    Fang, S.C.2    Tsividis, Y.3
  • 8
    • 0019009699 scopus 로고
    • Practical implementation of a general computer aided design technique for switched capacitor circuits
    • Apr.
    • H. J. De Man, J. Rabaey, G. Amout, and J. Vandewalle, “Practical implementation of a general computer aided design technique for switched capacitor circuits,” IEEE J. Solid-State Circuits, pp. 190-200, Apr. 1980.
    • (1980) IEEE J. Solid-State Circuits , pp. 190-200
    • De Man, H.J.1    Rabaey, J.2    Amout, G.3    Vandewalle, J.4
  • 13
    • 0025414182 scopus 로고
    • Asymptotic waveform evaluation for timing analysis
    • Apr.
    • L. T. Pillage and R. A. Rohrer, “Asymptotic waveform evaluation for timing analysis,” IEEE Trans. Comput.-Aided Design, vol. 9, no. 4, pp. 352-366, Apr. 1990.
    • (1990) IEEE Trans. Comput.-Aided Design , vol.9 , Issue.4 , pp. 352-366
    • Pillage, L.T.1    Rohrer, R.A.2
  • 16
    • 0005599053 scopus 로고
    • Pade approximation of linear(ized) circuit responses
    • Carnegie Mellon Univ., Pittsburgh, PA, Nov.
    • X. Huang, “Pade approximation of linear(ized) circuit responses,” Ph.D. dissertation, Carnegie Mellon Univ., Pittsburgh, PA, Nov. 1990.
    • (1990) Ph.D. dissertation
    • Huang, X.1
  • 18
    • 0027004911 scopus 로고
    • AWESymbolic: Compiled circuit analysis using asymptotic waveform evaluation
    • J. Lee and R. A. Rohrer, “AWESymbolic: Compiled circuit analysis using asymptotic waveform evaluation,” in Proc. Design Automation Conf, 1992, pp. 213-218.
    • (1992) in Proc. Design Automation Conf , pp. 213-218
    • Lee, J.1    Rohrer, R.A.2
  • 20
    • 0043253017 scopus 로고    scopus 로고
    • Meta-Software, 50 Curtner Ave., Suite 16, Campbell, CA 95008
    • HSPICE User’s Manual, Meta-Software, 50 Curtner Ave., Suite 16, Campbell, CA 95008.
    • HSPICE User’s Manual
  • 21
    • 84943130845 scopus 로고
    • Input sampling switch charge conservation
    • Feb.
    • B. Scott, “Input sampling switch charge conservation,” U.S. Patent 5 187 390, Feb. 1993.
    • (1993) U.S. Patent 5 187 390
    • Scott, B.1
  • 22
    • 0024124005 scopus 로고
    • The design of sigma-delta modulation analog-to-digital converters
    • Dec.
    • B. E. Boser and B. A. Wooley, “The design of sigma-delta modulation analog-to-digital converters,” IEEE J. Solid-State Circuits, vol. 6, pp. 1298-1308, Dec. 1988.
    • (1988) IEEE J. Solid-State Circuits , vol.6 , pp. 1298-1308
    • Boser, B.E.1    Wooley, B.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.