-
2
-
-
0020806997
-
A tutorial on computer-aided analysis of switched-capacitor circuits
-
Aug.
-
M. L. Liou, Y.-L. Kuo, and C. F. Lee, “A tutorial on computer-aided analysis of switched-capacitor circuits,” Proc. IEEE, Aug. 1983.
-
(1983)
Proc. IEEE
-
-
Liou, M.L.1
Kuo, Y.-L.2
Lee, C.F.3
-
3
-
-
0003369344
-
SPICE2: A computer program to simulate semiconductor circuits
-
Univ. California, Berkeley, May
-
L. W. Nagel, “SPICE2: A computer program to simulate semiconductor circuits,” Electron. Res. Lab. Rep. ERL M520, Univ. California, Berkeley, May 1975.
-
(1975)
Electron. Res. Lab. Rep. ERL M520
-
-
Nagel, L.W.1
-
4
-
-
0018453026
-
Exact analysis of swtiched-capacitor circuits with arbitrary inputs
-
Apr.
-
M. L. Liou and Y. L. Kuo, “Exact analysis of swtiched-capacitor circuits with arbitrary inputs,” IEEE Trans. Circuits Syst., Apr. 1979.
-
(1979)
IEEE Trans. Circuits Syst.
-
-
Liou, M.L.1
Kuo, Y.L.2
-
6
-
-
0025542703
-
Simulation of mixed switched-capacitor/digital networks with signal driven switches
-
Dec.
-
K. Suyama, S. C. Fang, and Y. Tsividis, “Simulation of mixed switched-capacitor/digital networks with signal driven switches,” IEEE J. Solid-State Circuits, pp. 1403-1413, Dec. 1990.
-
(1990)
IEEE J. Solid-State Circuits
, pp. 1403-1413
-
-
Suyama, K.1
Fang, S.C.2
Tsividis, Y.3
-
8
-
-
0019009699
-
Practical implementation of a general computer aided design technique for switched capacitor circuits
-
Apr.
-
H. J. De Man, J. Rabaey, G. Amout, and J. Vandewalle, “Practical implementation of a general computer aided design technique for switched capacitor circuits,” IEEE J. Solid-State Circuits, pp. 190-200, Apr. 1980.
-
(1980)
IEEE J. Solid-State Circuits
, pp. 190-200
-
-
De Man, H.J.1
Rabaey, J.2
Amout, G.3
Vandewalle, J.4
-
9
-
-
84869452040
-
Switched capacitor simulation models for full chip verification
-
T. Chanak, R. Chadha, and K. Singhal, “Switched capacitor simulation models for full chip verification,” in Proc. IEEE Custom Integrated Circuits Conf, 1989, pp. 21.1.1-21.1.4.
-
(1989)
in Proc. IEEE Custom Integrated Circuits Conf
, pp. 1-4
-
-
Chanak, T.1
Chadha, R.2
Singhal, K.3
-
12
-
-
0025543665
-
AWEsim: A program for the efficient analysis of linear(ized) circuits
-
Nov.
-
X. Huang, V. Raghavan, and R. A. Rohrer, “AWEsim: A program for the efficient analysis of linear(ized) circuits,” in Proc. IEEE Int. Conf Comput. Aided Design, Nov. 1990, pp. 534-537.
-
(1990)
in Proc. IEEE Int. Conf Comput. Aided Design
, pp. 534-537
-
-
Huang, X.1
Raghavan, V.2
Rohrer, R.A.3
-
13
-
-
0025414182
-
Asymptotic waveform evaluation for timing analysis
-
Apr.
-
L. T. Pillage and R. A. Rohrer, “Asymptotic waveform evaluation for timing analysis,” IEEE Trans. Comput.-Aided Design, vol. 9, no. 4, pp. 352-366, Apr. 1990.
-
(1990)
IEEE Trans. Comput.-Aided Design
, vol.9
, Issue.4
, pp. 352-366
-
-
Pillage, L.T.1
Rohrer, R.A.2
-
16
-
-
0005599053
-
Pade approximation of linear(ized) circuit responses
-
Carnegie Mellon Univ., Pittsburgh, PA, Nov.
-
X. Huang, “Pade approximation of linear(ized) circuit responses,” Ph.D. dissertation, Carnegie Mellon Univ., Pittsburgh, PA, Nov. 1990.
-
(1990)
Ph.D. dissertation
-
-
Huang, X.1
-
17
-
-
84870041540
-
Exploiting partitioning in asymptotic waveform evaluation (AWE)
-
M. M. Alaybeyi, J. E. Bracken, J. Y. Lee, V. Raghavan, R. J. Trihy, and R. A. Rohrer, “Exploiting partitioning in asymptotic waveform evaluation (AWE),” in Proc. IEEE Custom Integrated Circuits Conf, 1992.
-
(1992)
in Proc. IEEE Custom Integrated Circuits Conf
-
-
Alaybeyi, M.M.1
Bracken, J.E.2
Lee, J.Y.3
Raghavan, V.4
Trihy, R.J.5
Rohrer, R.A.6
-
18
-
-
0027004911
-
AWESymbolic: Compiled circuit analysis using asymptotic waveform evaluation
-
J. Lee and R. A. Rohrer, “AWESymbolic: Compiled circuit analysis using asymptotic waveform evaluation,” in Proc. Design Automation Conf, 1992, pp. 213-218.
-
(1992)
in Proc. Design Automation Conf
, pp. 213-218
-
-
Lee, J.1
Rohrer, R.A.2
-
19
-
-
0024029371
-
Simulating and testing oversampled analog-to-digital converters
-
June
-
B. E. Boser, K. P. Karmann, H. Martin, and B. A. Wooley, “Simulating and testing oversampled analog-to-digital converters,” IEEE J. Solid-State Circuits, pp. 668-674, June 1988.
-
(1988)
IEEE J. Solid-State Circuits
, pp. 668-674
-
-
Boser, B.E.1
Karmann, K.P.2
Martin, H.3
Wooley, B.A.4
-
20
-
-
0043253017
-
-
Meta-Software, 50 Curtner Ave., Suite 16, Campbell, CA 95008
-
HSPICE User’s Manual, Meta-Software, 50 Curtner Ave., Suite 16, Campbell, CA 95008.
-
HSPICE User’s Manual
-
-
-
21
-
-
84943130845
-
Input sampling switch charge conservation
-
Feb.
-
B. Scott, “Input sampling switch charge conservation,” U.S. Patent 5 187 390, Feb. 1993.
-
(1993)
U.S. Patent 5 187 390
-
-
Scott, B.1
-
22
-
-
0024124005
-
The design of sigma-delta modulation analog-to-digital converters
-
Dec.
-
B. E. Boser and B. A. Wooley, “The design of sigma-delta modulation analog-to-digital converters,” IEEE J. Solid-State Circuits, vol. 6, pp. 1298-1308, Dec. 1988.
-
(1988)
IEEE J. Solid-State Circuits
, vol.6
, pp. 1298-1308
-
-
Boser, B.E.1
Wooley, B.A.2
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