A 7 Mbyte/s (65 MHz), Mixed-Signal, Magnetic Recording Channel DSP Using Partial Response Signaling with Maximum Likelihood Detection

IEEE Journal of Solid-State Circuits

Volumn 29, Issue 3, 1994, Pages 177-184

  Philpott, Rick A ^a   Kertis, Robert A ^a   Richetta, Ray A ^a   Schmerbeck, Timothy J ^a   Schulte, Donald J ^a  

^a IBM   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA RECORDING; ENCODING (SYMBOLS); MAGNETIC STORAGE; SIGNAL DETECTION; SIGNAL PROCESSING;

CMOS LOGIC STATES; ERROR RATE; FIR FILTERS;

INTEGRATED CIRCUITS;

EID: 0028385401     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.278338     Document Type: Article

References (16)

1. L. D. Smith, H. R. Farmer, M. Kunesh, M. A. Masetti, D. Willmott, R. Hedman, R. Richetta, and T. J. Schmerbeck, “A CMOS-based analog standard cell product family,” IEEE J. Solid-State Circuits, vol. 24, pp. 370-379, Apr. 1989.
2. R. Philpott, R. Kertis, R. Richetta, T. Schmerbeck, and D. Schulte, “A 7MB/sec (65MHz), mixed-signal, magnetic recording channel DSP using partial response signaling with maximum likelihood detection,” in IEEE Custom Integrated Circuits Conf. Dig., May 1993, pp. 10.4.1-10.4.4.
3. R. D. Cideciyan, F. Dolivo, R. Hermann, W. Hirt, and W. Schott, “ A PRML system for digital magnetic recording,” IEEE J. Select. Areas Commun., vol. 10, pp. 38-56, Jan. 1992.
4. T. Schmerbeck, R. Richetta, and L. Smith, “A 27MHZ mixed analog/digital, magnetic recording channel DSP using partial response signaling with maximum likelihood detection,” in Tech. Dig. Int. Solid State Circuits Conf., Feb. 1991, pp. 136, 137, 304.
5. J. D. Coker, R. L. Galbraith, G. J. Kerwin, J. W. Rae, and P. A. Ziperovich, “Implementation of PRML in a rigid disk drive,” IEEE Trans. Magn., vol. 27, pp. 4538-1543, Nov. 1991.
6. F. Dolivo, R. Hermann, and S. Olcer, “Performance and sensitivity analysis of ML sequence detection on magnetic recording channels,” IEEE Trans. Magn., vol. 25, pp. 4072-1074, Sept. 1989.
7. T. D. Howell, D. P. McCrown, T. A. Diola, Y. S. Tang, K. R. Hense, and R. L. Gee, “Error rate performance of experimental gigabit per square inch recording components,” IEEE Trans. Magn., vol. 26, pp. 2298-2302, Sept. 1990.
8. P. A. Ziperovich, “Performance degradation of PRML channels due to nonlinear distortions,” IEEE Trans. Magn., vol. 27, pp. 4825-4827, Nov. 1991.
9. D. C. Palmer and J. D. Coker, “Media design considerations for a PRML channel,” IEEE Trans. vol. 29, 189-194, Jan. 1993.
10. R. D. Barndt, A. J. Armstrong, and J. K. Wolf, “Media selection for high density recording channels,” IEEE Trans. Magn., vol. 29, pp. 183-188, Jan. 1993.
11. H. K. Thapar and T. D. Howell, “On the performance of partial response maximum-likelihood and peak detection methods in digital recording,” in Tech. Dig., Magn. Recording Conf, June 1991.
12. P. A. Ziperovich and J. K. Wolf, “CMOS implementation of a Viterbi detector for hard disk drives,” in IEEE Custom Integrated Circuits Conf Dig., May 1993, pp. 10.3.1-10.3.4.
13. T. W. Matthews and R. R. Spencer, “An analog CMOS Viterbi detector for digital magnetic recording,” in ISSCC Dig. Tech. Papers, Feb. 1993, pp. 214-215, 291.
14. R. L. Galbraith, “Method and apparatus for implementing PRML codes with maximum ones,” IBM, U.S. Patent 5196849, Mar. 1993.
15. J. Eggenberger and A. Patel, “Method and apparatus for implementing optimum PRML codes,” IBM U.S. Patent 4707681, Nov. 1987.
16. P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 2nd ed. New York: Wiley, 1984, pp. 619-622.