Architecture of a high speed reed·solomon decoder

IEEE Transactions on Consumer Electronics

Volumn 40, Issue 1, 1994, Pages 75-82

  Iwaki, Tetsuo ^a   Okuda, Tohru ^a   Sasada, Taizoh ^a   Tanaka, Toshihisa ^a   Yamada, Eiji ^a  

^a SHARP CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SIGNAL PROCESSING; ERROR DETECTION; SOUND RECORDING; TELEVISION EQUIPMENT; VIDEO RECORDING;

AUDIO EQUIPMENT; HIGH RATE DATA DECODING; MULTIPLE ERROR CORRECTION CAPABILITY; REED-SOLOMON CODE;

ERROR CORRECTION;

EID: 0028379822     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/30.273648     Document Type: Article

References (6)

1. I. S. Reed and G. Solomon, “Polynomial code over certain finite field,” J. Soc. Indust. Appl. Math., vol. 8, pp. 300-304, 1960.
2. W. W. Peterson, “Encoding and error-correction Procedures for the Bose-Chaudhuri codes,” IRE Trans. Inform. Theory, vol. IT-6, pp. 459-470, 1960.
3. F. Polkinghom, Jr., “Decoding of double and triple error correcting Bose-Chaudhuri code,” IEEE Trans. Inform. Theory, vol. T1-12, pp. 480-481, 1966.
4. R. T. Chien, “Cyclic decoding Procedure for Bose-Chaudhuri -Hocquenghem codes,” IEEE Trans. Inform. Theory, vol. IT-10, pp. 357-363, 1964.
5. H. M. Shao, T. K. Truong, L. J. Deutsch, J. H. Yuen and I. S. Reed, “A VLSI design of a pipeline Reed-Solomon Solomon decoder,” IEEE Trans. Comput., vol. C-34, pp. 393-402, 1985.
6. A. M. Patel, “On-the-fly decoder for multiple byte errors,” IBM J. Res. Develop., vol. 30, no.3, pp. 259-269, 269, 1986.