Analytical surface potential expression for thin-film double-gate SOI MOSFETs

Solid State Electronics

Volumn 37, Issue 2, 1994, Pages 327-332

  Suzuki, Kunihiro ^a   Tanaka, Tetsu ^a   Tosaka, Yoshiharu ^a   Horie, Hiroshi ^a   Arimoto, Yoshihiro ^a   Itoh, Takashi ^a  

^a FUJITSU LABORATORIES LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

DOPING (ADDITIVES); ELECTRIC VARIABLES MEASUREMENT; NUMERICAL ANALYSIS; PERMITTIVITY MEASUREMENT;

CARRIER CONCENTRATION; CHANNEL DOPING CONCENTRATION; LOW DOPING CONCENTRATION; PERMITTIVITY CONSTANT; SURFACE ELECTRIC FIELD;

MOSFET DEVICES;

EID: 0028378433     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/0038-1101(94)90085-X     Document Type: Article

References (18)

1. SSDM Tech. Dig.
2. Comments, with reply, on 'Dual-gate operation and volume inversion in n-channel SOI MOSFETs' by S. Venkatesan et al