SPADES-ACE: A Simulator for Path Delay Faults in Sequential Circuits with Extensions to Arbitrary Clocking Schemes

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 13, Issue 2, 1994, Pages 251-263

  Pomeranz, Irith ^a   Reddy, Sudhakar M ^a  

^a UNIVERSITY OF IOWA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC CLOCKS; ELECTRIC FAULT LOCATION; FLIP FLOP CIRCUITS; RANDOM PROCESSES; SEQUENTIAL CIRCUITS; SIMULATORS; STATE ASSIGNMENT; TIMING CIRCUITS; TRANSIENTS;

ARBITRARY CLOCKING SCHEMES; CLOCKING; PATH DELAY FAULTS; SPADES-ACE; SYNCHRONOUS SEQUENTIAL CIRCUITS;

INTEGRATED CIRCUIT TESTING;

EID: 0028374730     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.259948     Document Type: Article

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