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Journal of VLSI Signal Processing

Volumn 7, Issue 1-2, 1994, Pages 17-31

Performance of iterative computation in self-timed rings

(1) Williams, Ted E a

a HaL Computer Systems (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SYSTEMS; MULTIPROCESSING SYSTEMS; PIPELINE PROCESSING SYSTEMS; SIGNAL PROCESSING;

ITERATIVE COMPUTING; SELF-TIMED RINGS; SYNCHRONOUS CIRCUITS;

COMPUTER CIRCUITS;

EID: 0028369772 PISSN: 09225773 EISSN: 1573109X Source Type: Journal
DOI: 10.1007/BF02108187 Document Type: Article

Times cited : (41)

References (17)

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2
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3
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4
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5
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- A zero-overhead self-timed 160 nS 54 bit CMOS divider
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6
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- System timing
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- (1980) Mead and Conway
- Seitz, C.L.¹

7
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- M. Greenstreet and K. Steiglitz, “Throughput of long self-timed pipelines,” CS-TR-190-88, Princeton U., Nov. 1988.

8
- 0003576234
- Analysis of asynchronous concurrent systems by Petri-nets
- MIT, Cambridge, MA
- (1974) Project MAC, TR-120
- Ramachandani, C.¹

9
- 0000549481
- Marked directed graphs
- (1971) Journal of Computer and System Sciences , vol.5 , pp. 511-523
- Commoner, F.G.¹

10
- 84936408150
- S.K. Rao, “Analysis and construction of synchronous regular iterative arrays,” Ph.D. Dissertation, Stanford Univ., 1985.

11
- 84936425917
- T.A. Chu, “Synthesis of self-timed control circuit from graphs: an example,”Proceedings of ICCD, 1986, pp. 565–571.

12
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- Automatic synthesis of asynchronous circuits from high-level specifications
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13
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- J.T. Udding, “Classification and composition of delay-insensitive circuits,” Ph.D. Dissertation, Eindhoven Tech. Univ., 1986.

14
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- Compiling communicating processes into delay-insensitive VLSI circuits
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- Martin, A.¹

15
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- Performance evaluation of asynchronous concurrent systems using Petri-nets
- (1980) IEEE Tran. on Software Engineering , vol.6 SE , pp. 440-449
- Ramamoorthy, C.¹ Ho, G.²

16
- 84936393930
- S. Burns, “Performance analysis and optimization of asynchronous circuits,” Ph.D. Dissertation, Caltech, 1991.

17
- 84936422535
- T. Williams, “Latency and throughput tradeoffs in self-timed asynchronous pipelines and rings,” Stanford Tech Report CSL-TR-90-431, Aug. 1990.

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.