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Volumn 13, Issue 1, 1994, Pages 13-26

Routability-Driven Technology Mapping for Lookup Table-Based FPGA's

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER SOFTWARE; CONFORMAL MAPPING; INTEGRATED CIRCUIT LAYOUT; LOGIC CIRCUITS; LOGIC GATES; TABLE LOOKUP;

EID: 0028341924     PISSN: 02780070     EISSN: 19374151     Source Type: Journal    
DOI: 10.1109/43.273753     Document Type: Article
Times cited : (41)

References (28)
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    • Chortle-crf: Fast technology mapping for lookup table-based FPGA’s
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    • Francis, R.J.1    Rose, J.2    Vranesic, Z.3
  • 9
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    • Technology Mapping for a Two-Output RAM-based Field-Programmable Gate Arrays
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.