Analysis of “An MOS Four-Quadrant Analog Multiplier using Simple Two-Input Squaring Circuits with Source Followers”

IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications

Volumn 41, Issue 1, 1994, Pages 72-75

  Kimura, Katsuji ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; ELECTRIC CURRENT CONTROL; ELECTRIC NETWORK ANALYSIS; ELECTRIC RESISTANCE; GATES (TRANSISTOR); MODULATION; MOS DEVICES; SIGNAL PROCESSING; TRANSISTORS; VOLTAGE CONTROL;

ANALOG SIGNAL PROCESSING; FOUR-QUADRANT ANALOG MULTIPLIER;

MULTIPLYING CIRCUITS;

EID: 0028274528     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/81.260227     Document Type: Article

References (3)

1. H. Song and C. Kim, “A MOS four-quadrant analog multiplier using simple two-input squaring circuits with source followers,” IEEE J. Solid-State Circ., vol. 25, pp. 841–848, June 1990.
2. R. L. Geiger, P. E. Allen, and N. R. Strader, VLSI Design Techniques for Analog and Digital Circuits. New York: McGraw-Hill, 1990.
3. A. Nedungadi and T. R. Viswanathan, “Design of linear CMOS transconductance elements,” IEEE Trans. Circ. and Syst., vol. CAS-31, pp. 891–894, Oct. 1984.