Clocking considerations for a PentiumTM-based CPU module with 512 K byte secondary cache

Proceedings of the 1994 IEEE Multi-Chip Module Conference

Volumn , Issue , 1994, Pages 26-31

  Reinschmidt, Robert M ^a   Leuthold, Dale H ^a  

^a MicroModule Systems   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHANNEL CAPACITY; DATA STORAGE EQUIPMENT; ELECTRIC NETWORK PARAMETERS; ELECTRIC WAVEFORMS; ELECTRIC WIRING; ELECTRONICS PACKAGING; NETWORK COMPONENTS; PRINTED CIRCUIT BOARDS; RANDOM ACCESS STORAGE; TIMING CIRCUITS;

512 K BYTE SECONDARY CACHE; CLOCK WAVEFORM; CLOCKING CONSIDERATIONS; EDGE RATE; MEMORY BUS CONTROLLER; MULTICHIP MODULE; MULTIPLE CLOCK DRIVER OUTPUTS; OVERSHOOT; SKEW;

MICROPROCESSOR CHIPS;

EID: 0028264663     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)