Architectures for a real time classification processor

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1994, Pages 197-200

  Robert, M ^a   Gorria, P ^a   Miteran, J ^a   Turgis, S ^a  

^a UNIV MONTPELLIER   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CELLULAR ARRAYS; CLASSIFICATION (OF INFORMATION); CMOS INTEGRATED CIRCUITS; IMAGE PROCESSING; INTEGRATED CIRCUIT LAYOUT; LOGIC GATES; RANDOM ACCESS STORAGE; REAL TIME SYSTEMS;

FIELD PROGRAMMABLE GATE ARRAY; GEOMETRIC CLASSIFICATION METHOD; SRAM; STRESS PROTOTYPE TRAINING;

PARALLEL PROCESSING SYSTEMS;

EID: 0028115162     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)