Towards incorporating device parameter variations in timing analysis

Proceedings of the European Design and Test Conference

Volumn , Issue , 1994, Pages 338-342

  Sivaraman, Mukund ^a   Strojwas, Andrzej J ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CONSTRAINT THEORY; DELAY CIRCUITS; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK PARAMETERS; ELECTRONIC EQUIPMENT MANUFACTURE; PARAMETER ESTIMATION; TIMING DEVICES;

DEVICE PARAMETER SPACE EXPLORATION; MAXIMUM TRUE CIRCUIT DELAY; TIMED PATH SENSITIZATION EXPRESSIONS; TIMING VERIFICATION MECHANISM;

DIGITAL CIRCUITS;

EID: 0028044458     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (12)