Rapid prototyping of fault tolerant VLSI systems

Proceedings of the IEEE International Symposium on High-Level Synthesis

Volumn , Issue , 1994, Pages 126-131

  Karri, Ramesh ^a   Hogstedt, Karin ^a   Orailoglu, Alex ^a  

^a UNIVERSITY OF MASSACHUSETTS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMPUTER AIDED DESIGN; COMPUTER HARDWARE DESCRIPTION LANGUAGES; COMPUTER SYSTEM RECOVERY; ELECTRIC NETWORK SYNTHESIS; ERROR DETECTION; GRAPH THEORY; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; MICROPROGRAMMING; SYSTEMS ANALYSIS; VLSI CIRCUITS;

DATA FLOW GRAPH; FAULT TOLERANCE CONSTRAINTS; FAULT TOLERANT VLSI SYSTEMS; MICROARCHITECTURAL SYNTHESIS; RAPID PROTOTYPING;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0028026358     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)