162Mbit/s variable length decoding circuit using an adaptive tree search technique

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1994, Pages 107-110

  Ooi, Yasushi ^a   Taniguchi, Atsushi ^a   Demura, Shigeki ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CODES (SYMBOLS); DATA COMPRESSION; DECODING; IMAGE COMPRESSION; LOGIC CIRCUITS; REAL TIME SYSTEMS; TREES (MATHEMATICS); VIDEO SIGNAL PROCESSING;

ADAPTIVE TREE SEARCHING TECHNIQUE; ADDRESS DATA FIELD; CODE DATA; CONVENTIONAL BINARY SEARCH; DCT COEFFICIENTS; FULL BIT DECODING; HUFFMAN DECODER; MPEG VIDEO BIT STREAM; ROBUST DECODER; VARIABLE LENGTH DECODING CIRCUIT;

LOGIC DEVICES;

EID: 0028015152     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)