Manufacturability analysis environment - MAPEX

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 1994, Pages 309-312

  Heineken, H T ^a   Maly, W ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CIRCUIT THEORY; COMPUTER AIDED DESIGN; COSTS; DESIGN AIDS; ELECTRIC FAULT LOCATION; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK PARAMETERS; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; PARAMETER ESTIMATION;

GLOBAL PROCESS DISTURBANCES; MANUFACTURABILITY ANALYSIS; MANUFACTURABILITY PARAMETERS EXTRACTION ENVIRONMENT; SPOT DEFECTS; YIELD LOSS MECHANISMS; YIELD MODELING THEORY;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 0027929098     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)