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Volumn , Issue A-42, 1994, Pages 113-122
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Partitioning and hierarchical description of self-testable designs
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Author keywords
[No Author keywords available]
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Indexed keywords
COMBINATORIAL CIRCUITS;
DESIGN AIDS;
GRAPH THEORY;
HIERARCHICAL SYSTEMS;
INTEGRATED CIRCUIT TESTING;
LARGE SCALE SYSTEMS;
LOGIC DESIGN;
LOGIC GATES;
NETWORK COMPONENTS;
RELIABILITY;
SEQUENTIAL CIRCUITS;
SHIFT REGISTERS;
COMPLEX CIRCUITS;
HIERARCHICAL DESCRIPTION;
PARTITIONING DESCRIPTION;
REGISTER TRANSFER LEVEL;
SELF-TESTABLE DESIGNS;
INTEGRATED CIRCUIT LAYOUT;
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EID: 0027928564
PISSN: 09265473
EISSN: None
Source Type: Book
DOI: None Document Type: Book |
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Times cited : (1)
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References (13)
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