New clock-feedthrough compensation scheme for switched-current circuits

Electronics Letters

Volumn 29, Issue 16, 1993, Pages 1446-1448

  Jonsson, B ^a   Eriksson, S ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

Circuit design; Switched current circuits

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ERROR COMPENSATION; INTERFERENCE SUPPRESSION; MATHEMATICAL MODELS; SIGNAL FILTERING AND PREDICTION;

CLOCK FEEDTHROUGH COMPENSATION SCHEME; SWITCHED CURRENT CIRCUITS;

SWITCHING CIRCUITS;

EID: 0027909750     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19930968     Document Type: Article

References (5)

1. YANG, H. C., FIEZ, T. S., and ALLSTOT, D. J.: ‘Current-feedthrough effects and cancellation techniques in switched-current circuits’. Proc. Int. Symp. Circuits and Systems (ISCAS), IEEE, May 1990, pp. 3186-3188
2. TOUMAZOU, C., BATTERSBY, N. C., and MAGLARAS, C.: ‘High performance algorithmic dynamic current mirrors’, Electron. Lett., 1990, 26,(19), pp. 1593-1595
3. FIEZ, T. S., ALLSTOT, D. J., LIANG, G., and LAO, P.: ‘Signal dependent clock-feedthrough cancellation in switched-current circuits’. Proc. China 1991 Int. Conf. Circuits and Systems, Shenzhen, China, IEEE, June 1991, pp. 785-788
4. HOLMBERG, T.: ‘Studies on switched-current CMOS circuits with analog filter applications’. Thesis No. 302, LiU-Tek-Licl991: 42, Linkoping University, Sweden, 1991
5. BAIRD, R. T., FIEZ, T. S., and ALLSTOT, D. J.: ‘Speed and accuracy considerations in switched-current circuits’. Proc. Int. Symp. Circuits and Systems (ISCAS), IEEE, June 1991, pp. 1809-1812