Reconfigurable scan chains: A novel approach to reduce test application time

Volumn , Issue , 1993, Pages 710-715

  Narayanan, Sridhar ^a   Breuer, Melvin A ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DATA HANDLING; ELECTRIC NETWORK ANALYSIS; LOGIC DESIGN; MULTIPLEXING; OPTIMIZATION; SEQUENTIAL CIRCUITS; SHIFT REGISTERS;

RECONFIGURABLE SCAN CHAINS; TEST APPLICATIONS;

INTEGRATED CIRCUIT TESTING;

EID: 0027880706     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)