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Volumn 28, Issue 12, 1993, Pages 1207-1215

A 15-b 1-Msample/s Digitally Self-Calibrated Pipeline ADC

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL SIGNAL PROCESSING; INTEGRATED CIRCUITS; SOLID STATE DEVICES;

EID: 0027853599     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.261994     Document Type: Article
Times cited : (336)

References (15)
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  • 2
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  • 3
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    • A 12-b 1-Msample/s capacitor error-averaging pipelined A/D converter
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    • Song, B.-S.1    Tompset, M.F.2    Lakshmikumar, K.R.3
  • 4
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    • Dec
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    • Ohara, H.1
  • 6
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    • Dec
    • H.-Seung Lee, D. A. Hodges, and P. R. Gray, “A self-calibrating 15-b CMOS A/D converter,” IEEE J. Solid-State Circuits. vol. SC-19. no. 6, pp. 813–819, Dec. 1984.
    • (1984) IEEE. J. Solid-State Circurts , vol.SC-19 , Issue.6 , pp. 813-819
    • Lee, H.-S.1    Hodges, D.A.2    Gray, P.R.3
  • 8
    • 0026141224 scopus 로고
    • A 13-b 2. 5 MHz self-calibrated pipelined A/D converter in 3-μm CMOS
    • Apr
    • Y.-M. Lin, B. Kim, and P. R. Gray, “A 13-b 2. 5 MHz self-calibrated pipelined A/D converter in 3-μm CMOS,” IEEE J. Solid-State Circuits, vol. 26, pp. 628–636, Apr. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 628-636
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.