Low power self refresh mode DRAM with temperature detecting circuit

1993 Symposium on VLSI Circuits Digest of Technical Papers

Volumn , Issue , 1993, Pages 43-44

  Kagenishi, Yukihiro ^a   Hirano, Hiroshige ^a   Shibayama, Akinori ^a   Kotani, Hisakazu ^a   Moriwaki, Nobuyuki ^a   Kojima, Makoto ^a   Sumi, Tatsumi ^a  

^a PANASONIC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CONTROL SYSTEMS; RANDOM ACCESS STORAGE;

DYNAMIC RANDOM ACCESS MEMORY (DRAM); LOW POWER BACK BIAS GENERATOR; LOW POWER SELF REFRESH MODE; PERSONAL COMPUTER LOW POWER OPERATION; TEMPERATURE DETECTING CIRCUIT;

PERSONAL COMPUTERS;

EID: 0027853545     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/vlsic.1993.920531     Document Type: Conference Paper

References (3)