Ultra-Thin TiN/Ta2O5/W Capacitor Technology for 1Gbit DRAM

Technical Digest - International Electron Devices Meeting, IEDM

Volumn , Issue , 1993, Pages 49-52

  Kamiyama, S ^a   Suzuki, H ^a   Watanabe, H ^a   Sakai, A ^a   Oshida, M ^a   Tatsumi, T ^a   Tanigawa, T ^a   Kasai, N ^a   Ishitani, A ^a  

^a NEC CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITANCE; DEPOSITION; DYNAMIC RANDOM ACCESS STORAGE; SILICON; TIN; ANNEALING; LEAKAGE CURRENTS; RANDOM ACCESS STORAGE; ULSI CIRCUITS;

CELL CAPACITANCE; CRITICAL STEPS; EQUIVALENT THICKNESS; FILM DEPOSITION; HEMI-SPHERICAL; OPERATION VOLTAGE; OXYGEN PLASMA ANNEALING; STORAGE NODES; SURFACE OXYGEN; ULTRA-THIN;

SILICA; CAPACITORS;

CELL CAPACITANCE; HEMISPHERICAL GRAINED (HSG); STORAGE NODE SURFACE;

EID: 0027848475     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (4)

1. E. Fujii et aL, IEDM Tech. Dig. (1992) p.267
2. H. Itoh et al., IEDM Tech. Dig. (1991) p.831
3. S. Kamiyama et al., IEDM Tech. Dig. (1991) p.455
4. P. C. Fazan et al., IEDM Tech. Dig., (1992) p.263