Efficient implementation of self-checking adders and ALUs

Digest of Papers - International Symposium on Fault-Tolerant Computing

Volumn , Issue , 1993, Pages 586-595

  Nicolaidis, M ^a  

^a TMA Laboratory   (France)

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER SOFTWARE; ERROR DETECTION;

ALUS; PARITY PREDICTION SCHEME; SELF-CHECKING ADDERS; SELF-CHECKING CIRCUITS; STRONGLY FAULT SECURE CIRCUITS;

FAULT TOLERANT COMPUTER SYSTEMS;

EID: 0027844138     PISSN: 07313071     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)