Concurrent error detection in nonlinear digital circuits with applications to adaptive filters

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 1993, Pages 606-609

  Chatterjee, Abhijit ^a   Roy, Rabindra K ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE CONTROL SYSTEMS; DIGITAL SIGNAL PROCESSING; ELECTRIC FAULT CURRENTS; ERROR DETECTION; MATHEMATICAL MODELS; NONLINEAR NETWORK ANALYSIS; POLYNOMIALS; SIGNAL FILTERING AND PREDICTION; STATE ASSIGNMENT;

CHECKING CIRCUIT; CONCURRENT ERROR DETECTION (CED); NONLINEAR DIGITAL CIRCUITS;

DIGITAL CIRCUITS;

EID: 0027840785     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)