On accurate modeling and efficient simulation of CMOS opens

Proceedings of the International Test Conference

Volumn , Issue , 1993, Pages 875-882

  Di, Chennian ^a   Jess, J A G ^a  

^a EINDHOVEN UNIVERSITY OF TECHNOLOGY   (Netherlands)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; DATA STRUCTURES; ELECTRIC FAULT LOCATION; INTEGRATED CIRCUIT TESTING; MATHEMATICAL MODELS; PARALLEL PROCESSING SYSTEMS;

CMOS OPENS; REDUCED ORDERED BINARY DECISION DIAGRAM (ROBDD); SINGLE STUCK AT (SSA);

CMOS INTEGRATED CIRCUITS;

EID: 0027836999     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (23)