BIST and delay fault detection

Proceedings of the International Test Conference

Volumn , Issue , 1993, Pages 236-242

  Pilarski, Slawomir ^a   Pierzynska, Alicja ^a  

^a SIMON FRASER UNIVERSITY   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; COMBINATORIAL CIRCUITS; COMPUTATIONAL METHODS; ELECTRIC FAULT LOCATION; ELECTRIC NETWORK ANALYSIS; ELECTRIC NETWORK TOPOLOGY; MATHEMATICAL MODELS; STATE ASSIGNMENT;

BUILT IN SELF TEST (BIST) TECHNIQUES; DELAY FAULT DETECTION; STATE TRANSITIONS;

DELAY CIRCUITS;

EID: 0027834692     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (26)