Fast and accurate CMOS bridging fault simulation

Proceedings of the International Test Conference

Volumn , Issue , 1993, Pages 54-62

  Rearick, Jeff ^a   Patel, Janak H ^a  

^a HEWLETT PACKARD COMPANY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BRIDGE CIRCUITS; COMBINATORIAL CIRCUITS; ELECTRIC FAULT LOCATION; INTEGRATED CIRCUIT TESTING; LOGIC DESIGN; MATHEMATICAL MODELS; SEQUENTIAL CIRCUITS;

BRIDGING FAULT SIMULATION; GATE LEVEL STANDARD CELL DESIGN;

CMOS INTEGRATED CIRCUITS;

EID: 0027833778     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (25)