ESPRESSO-SIGNATURE: A New Exact Minimizer for Logic Functions

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 1, Issue 4, 1993, Pages 432-440

  McGeer, Patrick C ^a   Sanghavi, Jagesh V ^a   Bray ton, Robert K ^a   Sangiovanni Vincentelli, Alberto L ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; FUNCTION EVALUATION; OPTIMIZATION; SWITCHING FUNCTIONS; SWITCHING THEORY;

ESPRESSO-SIGNATURE; EXACT MINIMIZER; LOGIC FUNCTIONS; PRIME IMPLICANTS; TWO LEVEL LOGIC SYNTHESIS PROBLEM;

MINIMIZATION OF SWITCHING NETS;

EID: 0027832241     PISSN: 10638210     EISSN: 15579999     Source Type: Journal    
DOI: 10.1109/92.250190     Document Type: Article

References (13)

1. K. Bartlett, R. Brayton, G. Hachtel, R. Jacoby, C. Morrison, R. Rudell, A. Sangiovanni-Vincentelli, and A. Wang, “Multilevel logic minimization using implicit don't cares,” IEEE Trans. Comput.-Aided Design., vol. 7, pp. 723–740, June 1988.
2. R. Brayton, G. Hachtel, C. McMullen, and A. Sangiovanni-Vincentelli, Logic Minimization Algorithms for VLSI Synthesis. Boston, MA: Kluwer Academic, 1984.
3. O. Coudert and J.-C. Madre, “A new implicit graph-based prime and essential prime computation technique,” in Logic Synthesis and Optimization, T. Sasao, Ed. Boston, MA: Kluwer Academic, 1992.
4. M. Dagenais, V. Agarwal, and N. Rumin, “McBoole: A new procedure for exact logic minimization,” IEEE Trans. Comput.-Aided Design, vol. 5, pp. 229–238, Jan. 1986.
5. E.J. McCluskey, “Minimization of Boolean functions,” Bell Syst. Tech. J., 1956.
6. P. McGeer, J. Sanghavi, R. Brayton, and A. Sangiovanni-Vincentelli, “Espresso-signature: A new exact minimizer for logic functions,” in Proc. Design Automat. Conf., 1993, pp. 618–624.
7. P. McGeer, J. Sanghavi, R. Brayton, and A. Sangiovanni-Vincentelli, “Minimization or logic functions using essential signature sets, Proc. 6th Int. Conf. VLSI Design, 1993, pp. 323–328.
8. P.C. McGeer and R.K. Brayton, “The observability don't-care set and its approximations,” in Proc. Int. Conf. Comput. Design, 1990, pp. 45–48.
9. L. Nguyen, M. Perkowski, and N. Goldstein, “Palmini—fast Boolean minimizer for personal computers,” in Proc. Design Automat. Conf, July 1987, pp. 615–621.
10. W. Quine, “The problem of simplifying truth functions,” Amer. Mathemat. Monthly, 1952.
11. R. Brayton, P. McGeer, J. Sanghavi, and A. Sangiovanni-Vincentelli, “A new exact minimizer for two-level logic synthesis,” in Logic Synthesis and Optimization, T. Sasao, Ed. Boston, MA: Kluwer Academic, 1992.
12. R.L. Rudell, “Logic synthesis for VLSI design,” Ph.D. dissertation, Dept. Elect. Eng. Comput. Sci., Univ. California, Berkeley, 1989.
13. R.L. Rudell and A.L. Sangiovanni-Vincentelli, “Multiple-valued minimization for PLA optimization,” IEEE Trans. Comput.-Aided Design, vol. 6, pp. 727–750, Sept. 1987.