Hardness-Assurance and Testing Issues for Bipolar/BiCMOS Devices

IEEE Transactions on Nuclear Science

Volumn 40, Issue 6, 1993, Pages 1686-1693

  Nowlin, R Nathan ^a   Schrimpf, R D ^a   Fleetwood, D M ^b   Pease, R L ^c,d   Combs, W E ^e  

^a UNIVERSITY OF ARIZONA   (United States)

^b SANDIA NATIONAL LABORATORIES   (United States)

^c RLP Research   (United States)

^d MISSION RESEARCH CORPORATION   (United States)

^e NAVAL SURFACE WARFARE CENTER   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; CMOS INTEGRATED CIRCUITS; DEGRADATION; DOSIMETRY; GAMMA RAYS; HARDNESS TESTING; IONIZATION; RADIATION EFFECTS; RADIATION HARDENING; SEMICONDUCTOR DEVICE TESTING;

BI CMOS DEVICES; BIPOLAR CURRENT GAIN DEGRADATION; DOSE RATE DEPENDENCE; HARDNESS ASSURANCE; IRRADIATION;

BIPOLAR TRANSISTORS;

EID: 0027812038     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/23.273492     Document Type: Article

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