Graph based analysis of FPGA routing

European Design Automation Conference - Proceedings

Volumn , Issue , 1993, Pages 104-109

  Wu, Yu Liasng ^a   Marek Sadowska, Malgorzata ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

GRAPH THEORY;

FIELD PROGRAMMABLE GATE ARRAY (FPGA); FPGA ROUTING PROCESS; MAPPING GLOBAL ROUTING; TWO DIMENSIONAL INTERVAL PACKING PROBLEM; XILINX-LIKE ROUTING MODEL;

GATES (TRANSISTOR);

EID: 0027810731     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (15)