Charge Separation for Bipolar Transistors

IEEE Transactions on Nuclear Science

Volumn 40, Issue 6, 1993, Pages 1276-1285

  Kosier, S L ^a   Schrimpf, R D ^a   Wei, A ^a   Chai, F ^a   Nowlin, R N ^b   Fleetwood, D M ^c   DeLaus, M ^d   Pease, R L ^e   Combs, W E ^f  

^a UNIVERSITY OF ARIZONA   (United States)

^b Phillips Laboratories   (United States)

^c SANDIA NATIONAL LABORATORIES   (United States)

^d ANALOG DEVICES INC   (United States)

^e RLP Research   (United States)

^f NSWC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHARGE CARRIERS; COMPUTER SIMULATION; ELECTRIC CURRENT MEASUREMENT; ELECTRON TRANSPORT PROPERTIES; ESTIMATION; INTERFACES (MATERIALS); OXIDES; RADIATION DAMAGE; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR DIODES; VOLTAGE MEASUREMENT;

EMITTER BIAS; GATED DIODE; POSITIVE OXIDE TRAPPED CHARGE; SURFACE RECOMBINATION VELOCITY; TRANSITION VOLTAGE;

BIPOLAR TRANSISTORS;

EID: 0027809950     PISSN: 00189499     EISSN: 15581578     Source Type: Journal    
DOI: 10.1109/23.273541     Document Type: Article

References (14)

1. R.L. Pease, R.M. Turfler, D. Platteter, D. Emily, and R. Blice, “Total Dose Effects in Recessed Oxide Digital Bipolar Microcircuits,” IEEE Trans. Nucl. Sci., vol. NS-30, pp. 4216–4223, 1983.
2. R.L. Pease, W.E. Combs, and S. Clark, “Long Term Ionization Response of Several B iCMOS VLSIC Technologies,” in RADECS Proc., 1991, 114–118.
3. A.R. Hart, J.B.Smyth Jr., V.A.J. van Lint, D.P. Snowden, and R.E. Leadon, “Hardness Assurance Considerations for Long-Term Ionizing Radiation Effects on Bipolar Structures,” IEEE Tran. Nucl. Sci., vol. NS-25, pp. 1502–1507, 1978.
4. E.W. Enlow, R.L. Pease, W.E. Combs, R.D. Schrimpf, and R.N. Nowlin, “Response of Advanced Bipolar Processes to Ionizing Radiation,” IEEE Trans. Nucl. Sci., vol. NS-38, pp. 1342–1351, 1991.
5. R.N. Nowlin, R.D. Schrimpf, E.W. Enlow, W.E. Combs, and R.L. Pease, “Mechanisms of Ionizing-Radiation-Induced Gain Degradation in Modern Bipolar Devices,” in IEEE BCTM Tech. Digest, 1991, 174–177.
6. RN. Nowlin, E.W. Enlow, R.D. Schrimpf, and W.E. Combs, “Trends in the Total-Dose Response of Modern Bipolar Transistors,” IEEE Trans. Nucl. Sci., vol. 39, pp. 2026–2035, 1992.
7. P.J. McWhorter and P.S. Winokur, “Simple Technique for Separating the Effects of Interface Traps and Trapped-Oxide Charge in Metal-Oxide-Semiconductor Transistors,” Appl. Phys. Lett., vol. 48, pp. 133–135, 1986.
8. D.M. Fleetwood, M.R. Shaneyfelt, J.R. Schwank, P.S. Winokur, and F.W. Sexton, “Theory and Application of Dual-Transistor Charge Separation Analysis,” IEEE Trans. Nucl. Sci., vol. 36, pp. 1816–1824, 1989.
9. K.F. Galloway, M. Gaitan, and T. J. Russell, “A Simple Model for Separating Interface and Oxide Charge Effects in MOS Device Characteristics,” IEEE Trans. NucL Sci., vol. NS-31, pp. 1497–1501, 1984.
10. G. Groeseneken, H.E. Maes, N. Beltran, and R.F.D. Keersmaecker, “A Reliable Approach to Charge-Pumping Measurements in MOS Transistors,” IEEE Trans. Electron Devices, vol. ED-31, pp. 42–53, 1984.
11. V.G.K. Reddi, “Influence of Surface Conditions on Silicon Planar Transistor Current Gain,” Solid-State Electron., vol. 10, pp. 305–334, 1967.
12. S. Feindt, J.-J.J. Hajar, J. Lapham, and D. Buss, “XFCB: A High Speed Complementary Bipolar Process on Bonded SOI,” in IEEE BCTM Tech. Digest, pp. 264–267, 1992.
13. A.S. Grove, Physics and Technology ofSemiconductor Devices. New York: John Wiley and Sons, 1967.
14. SILVACO International, SPISCES 2B User's manual. Santa Clara, CA: 1991.