Routing for symmetric FPGAs and FPICs

Volumn , Issue , 1993, Pages 486-490

  Sun, Yachyang ^a   Wang, Ting Chi ^a   Wong, C K ^a   Liu, C L ^a  

^a UNIVERSITY OF ILLINOIS AT URBANA CHAMPAIGN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; APPROXIMATION THEORY; BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; CRITICAL PATH ANALYSIS; GRAPH THEORY; LOGIC DESIGN; MATHEMATICAL MODELS; SEMICONDUCTOR DEVICE STRUCTURES; SWITCHING CIRCUITS; SWITCHING FUNCTIONS; TREES (MATHEMATICS);

NODE WEIGHTED STEINER MINIMUM TREE PROBLEM; ROUTING STRUCTURES; SYMMETRIC FIELD PROGRAMMABLE GATE ARRAYS; SYMMETRIC FIELD PROGRAMMABLE INTERCONNECT CHIPS;

LOGIC CIRCUITS;

EID: 0027799216     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (14)