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Volumn 28, Issue 11, 1993, Pages 1131-1135

Switched-Source-Impedance CMOS Circuit For Low Standby Subthreshold Current Giga-Scale LSI’s

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; ELECTRIC CURRENT CONTROL; ELECTRIC CURRENTS; ELECTRIC IMPEDANCE; GATES (TRANSISTOR); LSI CIRCUITS; MOS DEVICES; RANDOM ACCESS STORAGE; SCHEMATIC DIAGRAMS; SEQUENTIAL CIRCUITS; VOLTAGE CONTROL;

EID: 0027698768     PISSN: 00189200     EISSN: 1558173X     Source Type: Journal    
DOI: 10.1109/4.245593     Document Type: Article
Times cited : (76)

References (6)
  • 1
    • 0016116644 scopus 로고
    • Design of ion-implanted MOSFET’s with very small physical dimensions
    • Oct.
    • R. H. Dennard et al., “Design of ion-implanted MOSFET’s with very small physical dimensions,” IEEE J. Solid-State Circuits, vol. SC-9, pp. 256–268, Oct. 1974.
    • (1974) IEEE J. Solid-State Circuits , vol.SC-9 , pp. 256-268
    • Dennard, R.H.1
  • 5
    • 5344239345 scopus 로고
    • 256-Mb DRAM technologies for file applications
    • Feb.
    • G. Kitsukawa et al., “256-Mb DRAM technologies for file applications,” ISSCC Dig. Tech. Papers, pp. 48–49, Feb. 1993.
    • (1993) ISSCC Dig. Tech. Papers , pp. 48-49
    • Kitsukawa, G.1
  • 6
    • 0025503285 scopus 로고
    • A tunable CMOS DRAM voltage limiter with stabilized feedback amplifier
    • Oct.
    • M. Horiguchi et al., “A tunable CMOS DRAM voltage limiter with stabilized feedback amplifier,” IEEE J. Solid-State Circuits, vol. 25, pp. 1129–1135, Oct. 1990.
    • (1990) IEEE J. Solid-State Circuits , vol.25 , pp. 1129-1135
    • Horiguchi, M.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.