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Volumn 29, Issue 24, 1993, Pages 2101-2103

iDD pulse response testing: A unified approach to testing digital and analogue ICs

Author keywords

Circuit testing; Integrated circuits

Indexed keywords

DEFECTS; DIGITAL INTEGRATED CIRCUITS; ELECTRIC CURRENTS; FREQUENCY RESPONSE; LINEAR INTEGRATED CIRCUITS; MATHEMATICAL MODELS; POWER SUPPLY CIRCUITS; SPECTRUM ANALYSIS; TRANSIENTS; VECTORS; VLSI CIRCUITS;

EID: 0027695991     PISSN: 00135194     EISSN: None     Source Type: Journal    
DOI: 10.1049/el:19931405     Document Type: Article
Times cited : (15)

References (7)
  • 1
    • 0022313916 scopus 로고
    • Electrical characteristics and testing considerations for gate oxide shorts in CMOS IC's\
    • HAWKINS, C.F., and SODEN, J.M.: ‘Electrical characteristics and testing considerations for gate oxide shorts in CMOS IC's\ Int. Test Conf., 1985, pp. 544-555
    • (1985) Int. Test Conf. , pp. 544-555
    • HAWKINS, C.F.1    SODEN, J.M.2
  • 2
    • 0019710943 scopus 로고
    • CMOS is most testable
    • LEVI, M.: ‘CMOS is most testable’. Int. Test Conf., 1981, pp. 217-220
    • (1981) Int. Test Conf. , pp. 217-220
    • LEVI, M.1
  • 3
    • 0024925765 scopus 로고
    • CMOS IC stuck-open fault electrical effects and design considerations
    • SODEN, J.M., TREECE, K., TAYLOR, M., and HAWKINS, C.: ‘CMOS IC stuck-open fault electrical effects and design considerations’. Int. Test Conf., 1989, pp. 423-430
    • (1989) Int. Test Conf. , pp. 423-430
    • SODEN, J.M.1    TREECE, K.2    TAYLOR, M.3    HAWKINS, C.4
  • 4
    • 0023601212 scopus 로고
    • Measurements of quiescent power supply current for CMOS IC's in production testing
    • HORNING, L., SODEN, J., FRITZEMEIER, R., and HAWKINS, C.L. ‘Measurements of quiescent power supply current for CMOS IC's in production testing’. Int. Test Conf., 1987, pp. 300-309
    • (1987) Int. Test Conf. , pp. 300-309
    • HORNING, L.1    SODEN, J.2    FRITZEMEIER, R.3    HAWKINS, C.L.4
  • 5
    • 0024167571 scopus 로고
    • Built-in current testing feasibility study
    • November (Santa Clara, CA)
    • MALY, W., and NIGH, P.: ‘Built-in current testing feasibility study’. Int. Conf. on CAD, November 1988, (Santa Clara, CA), pp. 340-343
    • (1988) Int. Conf. on CAD , pp. 340-343
    • MALY, W.1    NIGH, P.2
  • 6
    • 85024327343 scopus 로고
    • Modelling of gate oxide shorts in MOS transistors
    • Department of Elect, and Comp. Eng. Carnegie Mellon University, April
    • SYRZCKI, M.: ‘Modelling of gate oxide shorts in MOS transistors’. Research Report CMUCAD-88-22, Department of Elect, and Comp. Eng. Carnegie Mellon University, April 1988
    • (1988) Research Report CMUCAD-88-22
    • SYRZCKI, M.1
  • 7
    • 0021622790 scopus 로고
    • Design techniques for cascoded CMOS opamps with improved PSRR and common-mode input range
    • RIBNER, D.B., and COPELAND, M.A.: ‘Design techniques for cascoded CMOS opamps with improved PSRR and common-mode input range’, IEEE J. Solid State Circuits, 1984, SC-19, (6), pp. 919-925
    • (1984) IEEE J. Solid State Circuits , vol.SC-19 , Issue.6 , pp. 919-925
    • RIBNER, D.B.1    COPELAND, M.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.