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Volumn 36, Issue 4, 1993, Pages 363-368

Noise Margin Criteria for Digital Logic Circuits

Author keywords

[No Author keywords available]

Indexed keywords

DIGITAL CIRCUITS; ELECTRIC INVERTERS; ELECTRICAL ENGINEERING; ELECTRONICS ENGINEERING; ENGINEERING EDUCATION; GRAPHIC METHODS; LOGIC GATES; SIGNAL TO NOISE RATIO; SPURIOUS SIGNAL NOISE; TRANSFER FUNCTIONS;

EID: 0027695492     PISSN: 00189359     EISSN: 15579638     Source Type: Journal    
DOI: 10.1109/13.241612     Document Type: Article
Times cited : (115)

References (20)
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.