The Basis and Architecture for the Reduction of Tones in a Sigma-Delta DAC

IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing

Volumn 40, Issue 7, 1993, Pages 429-439

  Ledzius, Robert C ^a   Irwin, James ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; DELTA MODULATION; MATHEMATICAL MODELS; MODULATORS; SIGNAL FILTERING AND PREDICTION; TIME DOMAIN ANALYSIS;

SIGMA DELTA MODULATORS; TONE REDUCTION;

DIGITAL TO ANALOG CONVERSION;

EID: 0027634063     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/82.238370     Document Type: Article

References (11)

1. J. C. Candy, “A use of limit cycle oscillations to obtain robust analog-to-digital converters,” IEEE TRANS. COMMUN., Vol. COM-22, No. 3, pp. 298-305, Mar. 1974.
2. G. R. Ritchie, J. Candy, and W. H. Ninke, “Interpolate digital-to-analog converters,” IEEE TRANS. COMMUN., Vol. COM-22, No. 11, pp. 1797-1806, Nov. 1974.
3. S. K. Tewksbury, “Oversampled, linear predictive and noise-shaping coders of order N > 1,” IEEE TRNAS. CIRCUITS SYST., vol. CAS-35, no. 7, pp. 436–447, July 1978.
4. J. C. Candy and J. B.O'Connell, “The structure of quantization noise from sigma-delta modulation,” IEEE TRANS. COMMUN., Vol. COM-29, No. 9, pp. 1316-1323, Sept. 1981.
5. J. Vanderkooy and S. P. Lipshitz, “Resolution below the least significant bit in digital systems with dither,” J. AUDIO ENG. SOC, Vol. 32, No. 3, pp. 106-113, Mar. 1984.
6. J. C. Candy, “A use of double integration in sigma delta modulation,” IEEE TRANS. COMMUN., Vol. COM-33, No. 3, pp. 249-258, Mar. 1985.
7. W. L. Lee and C. G. Sodini, “A topology for higher order interpolative coders,” 1987 IEEE Publ. CH2394-5/87/000-0459.
8. Y. Matsuya et., “A 16-bit oversampling A-to-D conversion technology using triple-integration noise shaping,” IEEE J. SOLID-STARE CIRCUITS, vol SC-22, no. 6, pp. 921–928, Dec. 1987.
9. B. E. Boser and B. A. Wooley, “Quantization error spectrum of sigma-delta modulators,” in PROC. 1988 INT. SYMP. CIRCUITS AND SYSTEMS, June 1988.
10. T. Cataltpe, A. R. Kramer, L. E. Larson, G. C. Temes, and R. H. Walden, “Digitally corrected multi-bit ΣΔ data converters,” 1989 IEEE ISCAS Publ. CH2692-2/89/000-0647.
11. R. Finck, “High performance stereo bit-stream DAC with digital filter,” LEEETRANS. CONSUMER ELECTRON., Vol. 35, No. 4, pp. 793-796, Nov. 1989.