Architecture of Field-Programmable Gate Arrays

Proceedings of the IEEE

Volumn 81, Issue 7, 1993, Pages 1013-1029

  Sangiovanni Vincentelli, Alberto ^c  

^a UNIVERSITY OF TORONTO   (Canada)

^b STANFORD UNIVERSITY   (United States)

^c UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMBINATORIAL CIRCUITS; COMPUTER ARCHITECTURE; ELECTRIC PROPERTIES; LOGIC CIRCUITS; LOGIC DESIGN; LOGIC DEVICES; LOGIC PROGRAMMING; MASKS; SEQUENTIAL CIRCUITS;

FIELD PROGRAMMABLE GATE ARRAYS; LOGIC BLOCK GRANULARITY; MASK PROGRAMMABLE GATE ARRAY; PROGRAMMABLE LOGIC DEVICES; PROGRAMMING TECHNOLOGY; ROUTING ARCHITECTURE;

LOGIC GATES;

EID: 0027627693     PISSN: 00189219     EISSN: 15582256     Source Type: Journal    
DOI: 10.1109/5.231340     Document Type: Article

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