Synthesis of Timed Asynchronous Circuits

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Volumn 1, Issue 2, 1993, Pages 106-119

  Myers, Chris J ^a   Meng, Teresa H Y ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INTEGRATED CIRCUITS; TIMING CIRCUITS;

ACYCLIC GRAPHS; BURST MODE; SIGNAL TRANSITION; TIMING CONSTRAINTS;

VLSI CIRCUITS;

EID: 0027617937     PISSN: 10638210     EISSN: 15579999     Source Type: Journal    
DOI: 10.1109/92.238425     Document Type: Article

References (25)

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