Boltzmann machine processor using single-bit operation

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences

Volumn E76-A, Issue 6, 1993, Pages 878-885

  Sasaki, Mamoru ^a   Kaneda, Shuichi ^a   Ueno, Fumio ^a   Inoue, Takahiro ^a   Kitamura, Yoshiki ^a  

^a KUMAMOTO UNIVERSITY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER AIDED DESIGN; MULTIPROCESSING SYSTEMS; NEURAL NETWORKS;

BOLTZMANN MACHINE; BUS CONNECTIONS;

PARALLEL PROCESSING SYSTEMS;

EID: 0027617717     PISSN: 09168508     EISSN: None     Source Type: Journal    
DOI: None     Document Type: Article

References (11)